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Texas Instruments /MSP432P4111 /FPB /FP_COMP0

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Interpret as FP_COMP0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (en_0b0)ENABLE 0COMP0 (en_0b00)REPLACE

REPLACE=en_0b00, ENABLE=en_0b0

Description

Flash Patch Comparator Registers

Fields

ENABLE

Compare and remap enable for Flash Patch Comparator Register 0. The ENABLE bit of FP_CTRL must also be set to enable comparisons. Reset clears the ENABLE bit.

0 (en_0b0): Flash Patch Comparator Register 0 compare and remap disabled

1 (en_0b1): Flash Patch Comparator Register 0 compare and remap enabled
COMP

Comparison address.
REPLACE

This selects what happens when the COMP address is matched. Settings other than b00 are only valid for instruction comparators. Literal comparators ignore non-b00 settings. Address remapping only takes place for the b00 setting.

0 (en_0b00): remap to remap address. See FP_REMAP

1 (en_0b01): set BKPT on lower halfword, upper is unaffected

2 (en_0b10): set BKPT on upper halfword, lower is unaffected

3 (en_0b11): set BKPT on both lower and upper halfwords.

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Register License

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data